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MC100LVEP14DTG

2.5 V / 3.3 V 1:5 Differential ECL/PECL/HSTL Clock / Data Fanout Buffer

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tel Tel: +852 95804164

MC100LVEP14DTG General Description

The MC100LVEP14 is a low skew 1 to 5 differential driver, designed with clock distribution in mind, accepting two clock sources into an input multiplexer. The ECL/PECL input signals can be either differential or single-ended (if the VBB output is used). HSTL inputs can be used when the LVEP14 is operating under PECL conditions.

Key Features

  • 100 ps Device-to-Device Skew
  • 25 ps Within Device Skew
  • 400 ps Typical Propagation Delay
  • Maximum Frequency > 2 GHz Typical
  • PECL and HSTL Mode: VCC = 2.375 V to 3.8 V with VEE = 0 V
  • NECL Mode: VCC = 0 V with VEE = -2.375 V to -3.8 V
  • LVDS Input Compatible
  • Open Input Default State

Specifications

Status Active Case Outline 9.48
MSL Temp (°C) 260 Container Type REEL

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Ratings and Reviews

More
S
S**l 05/23/2021

Nice delivered. All ok,

12
L
L**y 01/27/2021

Delivery is very fast.

6
S
S**a 04/12/2020

They are quite small but ok. 2__3 Amp it'll take anyway...

10

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MC100LVEP14DTG Datasheet PDF

Preliminary Specification MC100LVEP14DTG PDF Download

MC100LVEP14DTG PDF Preview

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