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CDCV304TPWREP +BOM

Fanout buffer for clock signals, featuring 4 output channels and 1 input channel

Manufacturer:

TI
Mfr.Part #:

CDCV304TPWREP
Datasheet:

CDCV304TPWREP Datasheet (PDF)
Function:

Single-ended
Additive RMS Jitter (typ) (fs):

56
Output Frequency (max) (MHz):

200
Number Of Outputs:

4
EDA/CAD Models:

Request Free CAD Models for CDCV304TPWREP

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CDCV304TPWREP X-Ray Inspection

CDCV304TPWREP General Description

The CDCV304TPWREP is a cutting-edge voltage-controlled clock buffer chip that sets the standard for precision timing in high-speed applications. Operating at 3.3V, this chip offers power-down capabilities to conserve energy when not in use, making it both efficient and environmentally friendly. With 4 controlled outputs that can be individually enabled or disabled, users have the flexibility to customize their clock distribution as needed. Additionally, one of the outputs includes a fixed divide-by-two function for added versatility

Key Features

This product offers a combination of high-speed and low-power performance
It includes a phase-locked loop, power-down mode, and output signal strength control
Suitable for use in various industries, including industrial automation, telecommunications, and data processing
Supports two operating modes: synchronous and asynchronous
Includes low additive jitter and wide input voltage range features

Specifications

Function	Single-ended	Additive RMS jitter (typ) (fs)	56
Output frequency (max) (MHz)	200	Number of outputs	4
Output supply voltage (V)	2.5, 3.3	Core supply voltage (V)	2.5, 3.3
Output skew (ps)	150	Features	1:4 fanout
Operating temperature range (°C)	-40 to 105	Rating	HiRel Enhanced Product
Output type	LVTTL	Input type	LVTTL