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CY37064P44-154JI is part of the CPLD Ultra37000 Family
PLCCManufacturer:
Mfr.Part #:
CY37064P44-154JI
Datasheet:
Feature-device-system-gates:
2000
Feature-maximum-operating-frequency-mhz:
154
Feature-minimum-operating-supply-voltage-v:
4.5
Feature-programmability:
Yes
EDA/CAD Models:
Please fill in the short form below and we will provide you the quotation immediately.
The Ultra37000™ family of CMOS CPLDs provides a range of high-density programmable logic solutions with unparalleled system performance. The Ultra37000 family is designed to bring the flexibility, ease of use, and performance of the 22V10 to high-density CPLDs. The architecture is based on a number of logic blocks that are connected by a Programmable Interconnect Matrix (PIM). Each logic block features its own product term array, product term allocator, and 16 macrocells. The PIM distributes signals from the logic block outputs and all input pins to the logic block inputs.
feature-process-technology | feature-device-system-gates | 2000 | |
feature-maximum-operating-frequency-mhz | 154 | feature-minimum-operating-supply-voltage-v | 4.5 |
feature-programmability | Yes | feature-maximum-operating-supply-voltage-v | 5.5 |
feature-maximum-internal-frequency-mhz | 154 | feature-maximum-propagation-delay-time-ns | 7.5 |
feature-packaging | feature-rad-hard | ||
feature-pin-count | 44 | feature-cecc-qualified | No |
feature-esd-protection | feature-military | No | |
feature-aec-qualified | No | feature-auto-motive | No |
feature-p-pap | No | feature-eccn-code | EAR99 |
feature-svhc | feature-svhc-exceeds-threshold | No |
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AVAQ determines and packages all devices based on electrostatic discharge (ESD) and moisture sensitivity level (MSL) protection requirements.
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