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EP3C25F324A7N +BOM

Advanced field-programmable gate array for electronic applications

EP3C25F324A7N General Description

A standout feature of the EP3C25F324A7N is its 65nm process technology, which contributes to its efficient performance and power consumption. For system integration, this FPGA provides 324 user I/O pins to facilitate connections with external devices and peripherals. Additionally, it includes various configuration options such as serial configuration and JTAG, enhancing its adaptability to different design requirements

Specifications

Part Life Cycle Code Active Reach Compliance Code compliant
HTS Code 8542.39.00.01 JESD-30 Code S-PBGA-B324
Length 19 mm Number of CLBs 24624
Number of Inputs 215 Number of Logic Cells 24624
Number of Outputs 215 Number of Terminals 324
Operating Temperature-Max 125 °C Operating Temperature-Min -40 °C
Organization 24624 CLBS Peak Reflow Temperature (Cel) NOT SPECIFIED
Programmable Logic Type FIELD PROGRAMMABLE GATE ARRAY Qualification Status Not Qualified
Seated Height-Max 3.5 mm Supply Voltage-Max 2.625 V
Supply Voltage-Min 2.375 V Supply Voltage-Nom 2.5 V
Surface Mount YES Technology CMOS
Temperature Grade AUTOMOTIVE Terminal Form BALL
Terminal Pitch 1 mm Terminal Position BOTTOM
Time@Peak Reflow Temperature-Max (s) NOT SPECIFIED Width 19 mm

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