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M1A3PE1500-2FGG676 +BOM

Ultra Low Density FPGAs.

M1A3PE1500-2FGG676 General Description

Security is a top priority with the M1A3PE1500-2FGG676 FPGA, offering features such as secure boot, anti-tamper protection, and bitstream encryption to ensure that intellectual property and sensitive data are safeguarded. These security features give designers peace of mind, knowing that their designs are protected from potential threats. With the M1A3PE1500-2FGG676 FPGA, engineers can focus on pushing the boundaries of what is possible, knowing that their designs are backed by robust security features

Key Features

  • The device has two 36-bit DDR3/DDR3L/LPDDR
  • memory interfaces
  • and 18 differential high speed transceivers

Specifications

Part Life Cycle Code Active Reach Compliance Code compliant
HTS Code 8542.39.00.01 Clock Frequency-Max 350 MHz
JESD-30 Code S-PBGA-B676 JESD-609 Code e1
Length 27 mm Moisture Sensitivity Level 3
Number of CLBs 38400 Number of Equivalent Gates 1500000
Number of Inputs 444 Number of Logic Cells 38400
Number of Outputs 444 Number of Terminals 676
Operating Temperature-Max 70 °C Operating Temperature-Min
Organization 38400 CLBS, 1500000 GATES Packing Method TRAY
Peak Reflow Temperature (Cel) 250 Power Supplies 1.5/3.3 V
Programmable Logic Type FIELD PROGRAMMABLE GATE ARRAY Qualification Status Not Qualified
Seated Height-Max 2.44 mm Supply Voltage-Max 1.575 V
Supply Voltage-Min 1.425 V Supply Voltage-Nom 1.5 V
Surface Mount YES Technology CMOS
Temperature Grade COMMERCIAL Terminal Finish TIN SILVER COPPER
Terminal Form BALL Terminal Pitch 1 mm
Terminal Position BOTTOM Time@Peak Reflow Temperature-Max (s) 30
Width 27 mm

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