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TL16C752CIPFB +BOM
UART IC 2, DUART Channel RS485 64 Byte 48-TQFP (7x7)
TQFP-48-
Manufacturer:
-
Mfr.Part #:
TL16C752CIPFB
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Datasheet:
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Number Of Channels:
2
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FIFO (Byte):
64
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Rx FIFO Trigger Levels (#):
16
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Tx FIFO Trigger Levels (#):
16
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EDA/CAD Models:
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Availability: 4219 PCS
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TL16C752CIPFB General Description
The TL16C752CIPFB is a dual UART with 64-byte FIFO (First-In-First-Out) buffers, which helps in reducing CPU overhead and improves data transfer rates. It supports both RS-232 and RS-485 serial communication standards, making it suitable for various applications requiring serial data transmission.
Key Features
- SC16C752B and XR16M752 Pin Compatible With Additional Enhancements
- Support 1.8-V, 2.5-V, 3.3-V, or 5-V Supply
- Characterized for Operation from –40°C to 85°C
- Supports up to:
- 48-MHz Oscillator Input Clock (3 Mbps) for 5-V Operation
- 32-MHz Oscillator Input Clock (2 Mbps) for 3.3-V Operation
- 24-MHz Input Clock (1.5 Mbps) for 2.5-V Operation
- 16-MHz Input Clock (1 Mbps) for 1.8-V Operation
- 64-Byte Transmit/Receive FIFO
- Software-Selectable Baud-Rate Generator
- Programmable and Selectable Transmit and Receive FIFO Trigger Levels for DMA, Interrupt Generation, and Software or Hardware Flow Control
- Software/Hardware Flow Control
- Programmable Xon and Xoff Characters With Optional Xon Any Character
- Programmable Auto-RTS and Auto-CTS-Modem Control Functions (CTS, RTS, DSR, DTR, RI, and CD)
- DMA Signaling Capability for Both Received and Transmitted Data on PN Package
- RS-485 Mode Support
- Infrared Data Association (IrDA) Capability
- Programmable Sleep Mode
- Programmable Serial Interface Characteristics
- 5, 6, 7, or 8-Bit Characters With 1, 1.5, or 2 Stop Bit Generation
- Even, Odd, or No Parity Bit Generation and Detection
- False Start Bit and Line Break Detection
- Internal Test and Loopback Capabilities
Application
- Embedded Systems
- Industrial Automation
- Networking Equipment
- POS Systems
- Telecommunications
- Test and Measurement
- Automotive
Specifications
Number of channels | 2 | FIFO (Byte) | 64 |
Rx FIFO trigger levels (#) | 16 | Tx FIFO trigger levels (#) | 16 |
Programmable FIFO trigger levels | Yes | CPU interface | X86 |
Baud rate at Vcc = 2.5 V & with 16x sampling (max) (MBps) | 1.5 | Baud rate at Vcc = 1.8 V & with 16x sampling (max) (MBps) | 1 |
Baud rate at Vcc = 3.3 V & with 16x sampling (max) (MBps) | 2 | Baud rate at Vcc = 5 V & with 16x sampling (max) (MBps) | 3 |
Operating voltage (V) | 1.8, 2.5, 3.3, 5 | Auto RTS/CTS | Yes |
Rating | Catalog | Operating temperature range (°C) | -40 to 85, 0 to 70 |
Pin Count | 48 | Released Date | Jan 12, 2017 |
Last Modified Date | Mar 7, 2023 4:10 PM UTC |
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