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W632GU6KB12I +BOM
2Gbit DDR3L SDRAM
96-WBGA (9x13)-
Manufacturer:
Winbond Electronics
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Mfr.Part #:
W632GU6KB12I
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Datasheet:
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Part Life Cycle Code:
Active
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Pin Count:
96
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Reach Compliance Code:
compliant
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ECCN Code:
EAR99
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EDA/CAD Models:
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Availability: 6147 PCS
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W632GU6KB12I General Description
Automotive manufacturers looking to enhance the performance of their onboard systems can trust the W632GU6KB12I chip to deliver reliable and fast data storage capabilities. Its DDR4 SDRAM technology ensures quick access to critical information, while the low-power design helps conserve energy without compromising on speed or capacity. Whether it's for infotainment systems, navigation tools, or advanced sensor networks, this memory chip excels in demanding automotive applications where quality and efficiency are paramount
Key Features
- Power Supply: VDD, VDDQ = 1.5V ± 0.075V
- Double Data Rate architecture: two data transfers per clock cycle
- Eight internal banks for concurrent operation
- 8 bit prefetch architecture
- CAS Latency: 6, 7, 8, 9, 10, 11 and 13
- Burst length 8 (BL8) and burst chop 4 (BC4) modes: fixed via mode register (MRS) or selectable On The-Fly (OTF)
- Programmable read burst ordering: interleaved or nibble sequential
- Bi-directional, differential data strobes (DQS and DQS#) are transmitted / received with data
- Edge-aligned with read data and center-aligned with write data
- DLL aligns DQ and DQS transitions with clock
- Differential clock inputs (CK and CK#)
- Commands entered on each positive CK edge, data and data mask are referenced to both edges of a differential data strobe pair (double data rate)
- Posted CAS with programmable additive latency (AL = 0, CL - 1 and CL - 2) for improved command, address and data bus efficiency
- Read Latency = Additive Latency plus CAS Latency (RL = AL + CL)
- Auto-precharge operation for read and write bursts
- Refresh, Self-Refresh, Auto Self-refresh (ASR) and Partial array self refresh (PASR)
- Precharged Power Down and Active Power Down
Specifications
Part Life Cycle Code | Active | Pin Count | 96 |
Reach Compliance Code | compliant | ECCN Code | EAR99 |
HTS Code | 8542.32.00.36 | Access Mode | MULTI BANK PAGE BURST |
Additional Feature | AUTO/SELF REFRESH | I/O Type | COMMON |
Interleaved Burst Length | 8 | JESD-30 Code | R-PBGA-B96 |
Memory IC Type | DDR3L DRAM | Memory Organization | 128MX16 |
Memory Width | 16 | Number of Functions | 1 |
Number of Ports | 1 | Number of Terminals | 96 |
Number of Words Code | 128000000 | Operating Mode | SYNCHRONOUS |
Output Characteristics | 3-STATE | Peak Reflow Temperature (Cel) | NOT SPECIFIED |
Refresh Cycles | 8192 | Self Refresh | YES |
Sequential Burst Length | 8 | Surface Mount | YES |
Technology | CMOS | Temperature Grade | INDUSTRIAL |
Terminal Form | BALL | Terminal Position | BOTTOM |
Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
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In Stock: 6,147
Minimum Order: 1
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