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74LVC2G17GW +BOM

The 74LVC2G17GW is a CMOS integrated circuit that functions as a Schmitt Trigger Buffer with two channels, housed in a 6-pin TSSOP package

Manufacturer:

NXP
Mfr.Part #:

74LVC2G17GW
Datasheet:

74LVC2G17GW Datasheet (PDF)
Package/Case:

SOT235
Product Type:

Buffers, Drivers, Receivers, Transceivers
RoHS:
EDA/CAD Models:

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74LVC2G17GW X-Ray Inspection

X-Ray inspection ensures product integrity by detecting internal defects without damaging external packaging. It reduces failure rates and enhances production efficiency, making it indispensable in the electronics components industry.

74LVC2G17GW General Description

The 74LVC2G17 is a dual buffer with Schmitt-trigger inputs. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments.This device is fully specified for partial power down applications using I. The I circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.

Key Features

Wide supply voltage range from 1.65 V to 5.5 V
Overvoltage tolerant inputs to 5.5 V
High noise immunity
±24 mA output drive (VCC = 3.0 V)
CMOS low-power consumption
Latch-up performance exceeds 250 mA
Direct interface with TTL levels
IOFF circuitry provides partial Power-down mode operation
Complies with JEDEC standard:JESD8-7 (1.65 V to 1.95 V)JESD8-5 (2.3 V to 2.7 V)JESD-8B/JESD36 (2.7 V to 3.6 V)
JESD8-7 (1.65 V to 1.95 V)
JESD8-5 (2.3 V to 2.7 V)
JESD-8B/JESD36 (2.7 V to 3.6 V)
ESD protection:HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 VCDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
Multiple package options
Specified from -40 °C to +85 °C and -40 °C to +125 °C