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See Technical Specifications

AX88179QF +BOM

Advanced QFN68 package with integrated switching regulator

Manufacturer:

Asix
Mfr.Part #:

AX88179QF
Datasheet:

AX88179QF Datasheet (PDF)
Part Life Cycle Code:

Contact Manufacturer
Reach Compliance Code:

compliant
HTS Code:

8542.31.00.01
Additional Feature:

SINGLE 25MHZ CLOCK AND IEEE 802.3AZ;802.3X AND IEEE 802.1Q;802.1P INTERFACE STANDARDS AVAILABLE
EDA/CAD Models:

Request Free CAD Models for AX88179QF

Email: [email protected]

Skype: live:.cid.ab6b29428937b76

Tel: +852 95804164

AX88179QF General Description

When it comes to seamless integration of Gigabit Ethernet into your devices, the AX88179QF stands out among the rest. Its efficient power usage ensures optimal performance without draining your resources. From desktop computers to tablets, this USB 3.0 to Gigabit Ethernet controller is a must-have for anyone looking to elevate their network game. Say goodbye to slow connections and hello to the future of high-speed networking with the AX88179QF

Key Features

Single chip PCI bus Fast Ethernet Controller.

Direct interface to PCI bus.

Support both 10Mbps and 100Mbps data rate.

Full or Half duplex operation supported for both10Mbps and 100Mbps operation.

Provides a MII port for both 10/100Mbps operation.

On chip PCS support for 100BASE-TX symbol mode operation.

On chip external 10Mbps ENDEC Interface.

Support 21MHz to 33MHz no wait state PCI Bus Interface.

Two large Independent FIFO for transmit and receive. no additional On board buffer memory required.

Interface to serial ROM for Ethernet ID address and jumper-less board design.

256KB boot ROM support.

On chip general purpose, programmable register and I/O pins.

Unlimited PCI burst.

external and internal loop-back capability.

Support early interrupts on transmit.

Powerful on chip buffer management DMA. And PCI Bus master operation reduce CPU utilization.

Big and little endian byte ordering supported.

IEEE 802.3u 100BASE-T, TX, and T4 Compatible.

160 pin or 144 pin PQFP package.

5V CMOS process.

Specifications

Part Life Cycle Code	Contact Manufacturer	Reach Compliance Code	compliant
HTS Code	8542.31.00.01	Additional Feature	SINGLE 25MHZ CLOCK AND IEEE 802.3AZ;802.3X AND IEEE 802.1Q;802.1P INTERFACE STANDARDS AVAILABLE
Bus Compatibility	USB	Drive Interface Standard	IEEE 802.3; IEEE 802.3U; IEEE
JESD-30 Code	S-XQCC-N68	Number of Terminals	68
Operating Temperature-Max	70 °C	Peak Reflow Temperature (Cel)	NOT SPECIFIED
Surface Mount	YES	Technology	CMOS
Temperature Grade	COMMERCIAL	Terminal Form	NO LEAD
Terminal Position	QUAD	Time@Peak Reflow Temperature-Max (s)	NOT SPECIFIED
uPs/uCs/Peripheral ICs Type	BUS CONTROLLER, UNIVERSAL SERIAL BUS