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See Technical Specifications

AX88796LF +BOM

Ethernet CTLR Single Chip 10Mbps/100Mbps 3.3V 128-Pin LQFP

Manufacturer:

ASIX ELECTRONICS CORP
Mfr.Part #:

AX88796LF
Datasheet:

AX88796LF Datasheet (PDF)
Part Life Cycle Code:

Contact Manufacturer
Reach Compliance Code:

compliant
HTS Code:

8542.31.00.01
JESD-30 Code:

R-PQFP-G128
EDA/CAD Models:

Request Free CAD Models for AX88796LF

Email: [email protected]

Skype: live:.cid.ab6b29428937b76

Tel: +852 95804164

AX88796LF General Description

The AX88796 Fast Ethernet Controller is a high performance and highly integrated local CPU bus Ethernet Controller with embedded 10/100Mbps PHY/Transceiver and 8K*16 bit SRAM. The AX88796 supports both 8 bit and 16 bit local CPU interfaces include MCS-51 series, 80186 series, MC68K series CPU and ISA bus. The AX88796 implements both 10Mbps and 100Mbps Ethernet function based on IEEE802.3 / IEEE802.3u LAN standard. The AX88796 also provides an extra IEEE802.3u compliant media-independent interface (MII) to support other media applications. Using MII interface, Home LAN PHY type media can be supported.

As well as, the chip also provides optional Standard Print Port ( parallel port interface ), can be used for printer server device or treat as simple general I/O port. The chip also support upto 3/1 additional General Purpose In/Out pins

Key Features

Highly integrated with embedded 10/100Mbps MAC, PHY and Transceiver

Embedded 8K * 16 bit SRAM

Compliant with IEEE 802.3/802.3u 100BASE-TX/FX specification

NE2000 register level compatible instruction

Single chip local CPU bus 10/100Mbps Fast Ethernet MAC Controller

Support both 8 bit and 16 bit local CPU interfaces include MCS-51 series, 80186 series and MC68K series CPU

Support both 10Mbps and 100Mbps data rate

Support both full-duplex or half-duplex operation

Provides an extra MII port for supporting other media. For example, Home LAN application

Support EEPROM interface to store MAC address

External and internal loop-back capability

Support Standard Print Port for printer server application

Support upto 3/1 General Purpose In/Out pins

128-pin LQFP low profile package

Low Power Consumption, typical under 100mA

0.25 Micron low power CMOS process. 25MHz Operation, Pure 3.3V operation with 5V I/O tolerance.

Specifications

Part Life Cycle Code	Contact Manufacturer	Reach Compliance Code	compliant
HTS Code	8542.31.00.01	JESD-30 Code	R-PQFP-G128
Number of Terminals	128	Operating Temperature-Max	70 °C
Operating Temperature-Min		Power Supplies	3.3 V
Qualification Status	Not Qualified	Supply Current-Max	120 mA
Supply Voltage-Nom	3.3 V	Surface Mount	YES
Technology	CMOS	Temperature Grade	COMMERCIAL
Terminal Form	GULL WING	Terminal Pitch	0.5 mm
Terminal Position	QUAD	uPs/uCs/Peripheral ICs Type	SERIAL IO/COMMUNICATION CONTROLLER, LAN