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See Technical Specifications

K4H511638F-LCB3 +BOM

DRAM Chip DDR SDRAM 512M-Bit 2.5V T/R

VDD : 2.5V0.2V, VDDQ : 2.5V0.2V for DDR266, 333

VDD : 2.6V0.1V, VDDQ : 2.6V0.1V for DDR400

Double-data-rate architecture; two data transfers per clock cycle

Bidirectional data strobe [DQS] (x4,x8) & [L(U)DQS] (x16)

Four banks operation

Differential clock inputs(CK and CK)

DLL aligns DQ and DQS transition with CK transition

MRS cycle with address key programs

-. Read latency : DDR266(2.5 Clock), DDR333(2.5 Clock), DDR400(3 Clock)

-. Burst length (2, 4, 8)

-. Burst type (sequential & interleave)

All inputs except data & DM are sampled at the positive going edge of the system clock(CK)

Data I/O transactions on both edges of data strobe

Edge aligned data output, center aligned data input

LDM,UDM for write masking only (x16)

DM for write masking only (x4, x8)

Auto & Self refresh

7.8us refresh interval(8K/64ms refresh)

Maximum burst refresh cycle : 8

66pin TSOP II Lead-Free & Halogen-Free package

RoHS compliant

ECCN (US)	EAR99	Part Status	Active
HTS	8542.32.00.51	Automotive	No
PPAP	No	Chip Density (bit)	2M
Organization	256Kx8	Address Bus Width (bit)	24
Programmability	Yes	Data Retention (Year)	200(Min)
Max. Access Time (ns)	80	Maximum Operating Frequency (MHz)	5
Interface Type	Serial-SPI	Minimum Operating Supply Voltage (V)	1.8
Typical Operating Supply Voltage (V)	5\|3.3\|2.5	Maximum Operating Supply Voltage (V)	5.5
Programming Voltage (V)	1.8 to 5.5	Operating Current (mA)	3
Minimum Operating Temperature (°C)	-40	Maximum Operating Temperature (°C)	85
Supplier Temperature Grade	Industrial	Hardware Data Protection	Yes
Packaging	Tape and Reel	Number of Bits per Word (bit)	8
Mounting	Surface Mount	PCB changed	8
Pin Count	8	Lead Shape	Gull-wing