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NT5CC256M16EP-DI +BOM

This item is specifically intended for OEM and CM customers, and cannot be purchased through brokers

NT5CC256M16EP-DI General Description

 Basis DDR3 Compliant-8n Prefetch Architecture-Differential C lock (   and Data Strobe(DQS/   -Double data rate on DQs, DQS and DM Data Integrity-Auto Self Refresh ( A SR) by DRAM built in T S-Auto Refresh and Self Refresh Mode s Power Saving Mode-Power Down Mode Signal Integrity-Configurable DS for system compatibility-Configurable On Die Termination-ZQ Calibration for DS/ODT impedance accuracy viaexternal ZQ pad (240 ohm 1%) Signal Synchronization-Write Leveling via MR settings 5-Read Leveling via MPR Interface and Power Supply-SSTL_15 for DDR3:VDD/VDDQ= 1.5V ((±0.075V-SSTL_135 2 for DDR3L:V DD/VDDQ= 1.35V 0.067/+0.1V

Specifications

Part Life Cycle Code Active Reach Compliance Code compliant
ECCN Code EAR99 HTS Code 8542.32.00.36
Access Mode MULTI BANK PAGE BURST Additional Feature AUTO/SELF REFRESH
JESD-30 Code R-PBGA-B96 Length 13 mm
Memory Density 4294967296 bit Memory IC Type DDR3L DRAM
Memory Width 16 Number of Functions 1
Number of Ports 1 Number of Terminals 96
Number of Words 268435456 words Number of Words Code 256000000
Operating Mode SYNCHRONOUS Operating Temperature-Max 95 °C
Operating Temperature-Min Organization 256MX16
Peak Reflow Temperature (Cel) NOT SPECIFIED Seated Height-Max 1 mm
Self Refresh YES Supply Voltage-Max (Vsup) 1.45 V
Supply Voltage-Min (Vsup) 1.283 V Supply Voltage-Nom (Vsup) 1.35 V
Surface Mount YES Technology CMOS
Temperature Grade OTHER Terminal Form BALL
Terminal Pitch 0.8 mm Terminal Position BOTTOM
Time@Peak Reflow Temperature-Max (s) NOT SPECIFIED Width 8 mm

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