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See Technical Specifications

NT6CL128M32BM-H2 +BOM

178-Pin FBGA 4Gbit 128Mx32 1.8V/1.2V DRAM Chip

Built-in 6502 8-bit CPU
2 MHz CPU operation frequency
5K bytes of ROM
160 bytes of SRAM
One 8-bit programmable base timer with 1 - 256 µsec interval
29 programmable bi-directional I/O pins
3 LED direct sink pins
Mask optional for built-in RC oscillator with an external resistor or external ceramic resonator applied
Mask optional for DATA/CLK driving capability
Watch-dog timer reset
Built-in power-on reset
Built-in low voltage reset
CMOS technology for low power consumption
Available in 40 pin DIP package and 40 pad Chip Form

Part Life Cycle Code	Obsolete	Reach Compliance Code	compliant
ECCN Code	EAR99	HTS Code	8542.32.00.36
Access Mode	MULTI BANK PAGE BURST	Additional Feature	AUTO/SELF REFRESH; IT ALSO REQUIRES 1.2V NOM
JESD-30 Code	R-PBGA-B178	Length	11.5 mm
Memory Density	4294967296 bit	Memory IC Type	DDR DRAM
Memory Width	32	Number of Functions	1
Number of Ports	1	Number of Terminals	178
Number of Words	134217728 words	Number of Words Code	128000000
Operating Mode	SYNCHRONOUS	Operating Temperature-Max	85 °C
Operating Temperature-Min	-25 °C	Organization	128MX32
Peak Reflow Temperature (Cel)	NOT SPECIFIED	Seated Height-Max	0.8 mm
Self Refresh	YES	Supply Voltage-Max (Vsup)	1.95 V
Supply Voltage-Min (Vsup)	1.7 V	Supply Voltage-Nom (Vsup)	1.8 V
Surface Mount	YES	Technology	CMOS
Temperature Grade	OTHER	Terminal Form	BALL
Terminal Pitch	0.8 mm	Terminal Position	BOTTOM
Time@Peak Reflow Temperature-Max (s)	NOT SPECIFIED	Width	10.5 mm